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Synopsys

SOC Engineering, Principal Engineer

Synopsys, Los Angeles, California, United States, 90079


Power Integrity Engineer, Principal

50220BRLocation: USA - California - Irvine, Mountain View/Sunnyvale, San Diego; USA - Texas - AustinJob Description and RequirementsAt Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. If you share our passion for innovation, we want to meet you.In the System Solutions Group we are shaping solutions for dependable systems, requiring safety, security, reliability, low power and more. Our team works with customers and industry partners to understand their needs and identify technical requirements.Role OverviewWe're looking for a 3DIC Packaging design engineer with emphasis on EMIR simulations. In this role, you will be a part of a team that designs cutting-edge packaging solutions for industry's leading 3DIC customers in the datacenter, AI/ML space. You will architect the power delivery for the system including the multi-chip module, substrate, PCB and on-die PDN models. An in-depth understanding of PDN fundamentals is required to successfully architect PDN budgets and plans for modeling of multiple power domains on the silicon interposers and between chiplets.ResponsibilitiesSetting up test-benches and running frequency and transient simulations.Design for low noise/spur, SSN and PSiJ.Understanding how power delivery impacts PLLs, clocks and overall system jitter.Working cross-functionally with Synopsys' IP teams to translate electrical specifications into design requirements.QualificationsBachelors, MS or Ph.D. degree in Electrical Engineering.10+ years of experience in Power Integrity field.Strong knowledge of Power/Signal Integrity fundamentals.Experience with chip-level PDN analysis using Redhawk for EM-IR.Expertise in the Electromagnetics field with experience using 2.5D and 3DFEM solvers.System-level power integrity simulation experience.Demonstrated ability to devise innovative design solutions.Preferred ExperiencePerformed SI/PI simulations for HBM2+, UCIe and other chiplet interfaces.Experience with 2/2.5D and/or 3D integration chip design projects.Understanding of ESD design and simulations.Knowledge of digital and analog equalization techniques.Strong organizational and planning skills.Experience working with multiple function teams for EDA tool collaboration.CompensationThe base salary range across the U.S. for this role is between $183,000 to $275,000. This role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package.Inclusion and DiversityInclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.Job Category:

EngineeringCountry:

United StatesJob Subcategory:

SOC EngineeringHire Type:

EmployeeBase Salary Range:

$183,000 - $275,000

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