Micron Memory Malaysia Sdn Bhd
Node Development CPI Engineer - TPG
Micron Memory Malaysia Sdn Bhd, Boise, Idaho, United States, 83708
Our vision is to transform how the world uses information to enrich life for
all .Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.As a Node Development CPI (Chip Package Integration) Engineer at Micron Technology, Inc., you will work closely with the Product, Quality, Design and Manufacturing teams to ensure first-time qualification success of Micron products. This team will also partner with multi-functional teams to define each silicon node’s Packaging Technology roadmaps and define strategies to ensure that Packaging Technology and interaction with front end manufacturing process are fully developed and qualified well ahead of any qualification of the product itself. Day to day activities can be as varied as tactical support of manufacturing excursions with data analysis, to brainstorming forward-looking test vehicles that will be used to mitigate risks related to potential CPI (chip-package interaction) issues that may impact first time qualification probability.Responsibilities and Tasks:Collaborate and validate in silicon the packaging technology needed for the DRAM Node including design rule and process margin validation by developing and driving targeted test vehicles.Development and integration of live die metrology, inline fab metrology, post assembly metrology to correlate front-end mfg to back-end mfg interactions.Support packaging development initiatives.Tactical Support of manufacturing continuous improvement initiatives.Tactical support of CPI related excursions and deviations (GDMs)Support Manufacturing Engineering for package characterization analysis.Create and deliver presentations on critical issues.Coordinate and facilitate meetings (status updates, Assembly, Quality teams, etc.).Publish packaging updates to Silicon Leads and Product Owners.Test data (Front-end and back-end) Data analysis and summarization.Desired Education and Experience:BSEE, BSME or equivalent.Proven industry semiconductor development experience.Proven experience with semiconductor packaging technology and associated front-end manufacturing interaction mechanisms.Familiarity with CPI fail-modes and analysis techniques.Familiarity with DRAM architecture, operation, testing, design, and manufacturing.Solid problem solving and analytical skills.Effective written and spoken communication skills.Good organizational skills.Ability to work within the framework of a cross-functional team.Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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all .Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.As a Node Development CPI (Chip Package Integration) Engineer at Micron Technology, Inc., you will work closely with the Product, Quality, Design and Manufacturing teams to ensure first-time qualification success of Micron products. This team will also partner with multi-functional teams to define each silicon node’s Packaging Technology roadmaps and define strategies to ensure that Packaging Technology and interaction with front end manufacturing process are fully developed and qualified well ahead of any qualification of the product itself. Day to day activities can be as varied as tactical support of manufacturing excursions with data analysis, to brainstorming forward-looking test vehicles that will be used to mitigate risks related to potential CPI (chip-package interaction) issues that may impact first time qualification probability.Responsibilities and Tasks:Collaborate and validate in silicon the packaging technology needed for the DRAM Node including design rule and process margin validation by developing and driving targeted test vehicles.Development and integration of live die metrology, inline fab metrology, post assembly metrology to correlate front-end mfg to back-end mfg interactions.Support packaging development initiatives.Tactical Support of manufacturing continuous improvement initiatives.Tactical support of CPI related excursions and deviations (GDMs)Support Manufacturing Engineering for package characterization analysis.Create and deliver presentations on critical issues.Coordinate and facilitate meetings (status updates, Assembly, Quality teams, etc.).Publish packaging updates to Silicon Leads and Product Owners.Test data (Front-end and back-end) Data analysis and summarization.Desired Education and Experience:BSEE, BSME or equivalent.Proven industry semiconductor development experience.Proven experience with semiconductor packaging technology and associated front-end manufacturing interaction mechanisms.Familiarity with CPI fail-modes and analysis techniques.Familiarity with DRAM architecture, operation, testing, design, and manufacturing.Solid problem solving and analytical skills.Effective written and spoken communication skills.Good organizational skills.Ability to work within the framework of a cross-functional team.Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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