Synopsys, Inc.
ASIC Digital Design/Emulation, Staff Engineer
Synopsys, Inc., Sunnyvale, California, United States, 94087
We Are:
At Synopsys, we drive innovations that shape our lives. Our technology powers the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, enabling high-performance silicon chips and software content. Join us to transform the future through continuous innovation. You Are:
We seek a highly motivated digital design engineer with expertise in ASIC development, modeling, and digital signal processing. You have a strong background in high-speed serializer and data recovery circuits. You excel in a collaborative environment, working with a team of digital and mixed signal engineers to deliver high-end designs. Detail-oriented and proactive, you thrive under tight deadlines and communicate effectively with design groups and customers. What You’ll Be Doing:
Developing and verifying ASIC RTL designs. Performing hardware emulation on FPGA platforms. Prototyping and validating systems for SerDes PHY. Creating verification environments using UVM methodology and System Verilog. Developing automation scripts in various languages. Collaborating with cross-functional teams to ensure design goals are met. The Impact You Will Have:
Contributing to next-generation product architecture. Enhancing the quality and performance of designs. Driving customer engagement and satisfaction. Influencing advanced features in our silicon IP portfolio. Setting industry standards with innovative solutions. Mentoring junior engineers. What You’ll Need:
Bachelor’s degree with 8+ years of relevant experience, or Master’s/PhD with 5+ years of relevant experience. Experience with hardware emulation on FPGA platforms. Experience with Zebu or Palladium platforms is a plus. Experience with formal verification methodology and relevant tools. Proficiency in system-level prototyping and validation for various protocols. Experience with UVM methodology and System Verilog. Proficiency in scripting languages. Knowledge of digital signal processing and data recovery circuits. Who You Are:
Self-motivated and proactive with attention to detail. Excellent organizational and communication skills. Effective networking with senior personnel. The Team You’ll Be A Part Of:
You will join a team of experienced engineers focused on delivering high-end mixed-signal designs. The team values collaboration and knowledge sharing, fostering a supportive and innovative work environment. Rewards and Benefits:
We offer comprehensive health, wellness, and financial benefits. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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At Synopsys, we drive innovations that shape our lives. Our technology powers the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, enabling high-performance silicon chips and software content. Join us to transform the future through continuous innovation. You Are:
We seek a highly motivated digital design engineer with expertise in ASIC development, modeling, and digital signal processing. You have a strong background in high-speed serializer and data recovery circuits. You excel in a collaborative environment, working with a team of digital and mixed signal engineers to deliver high-end designs. Detail-oriented and proactive, you thrive under tight deadlines and communicate effectively with design groups and customers. What You’ll Be Doing:
Developing and verifying ASIC RTL designs. Performing hardware emulation on FPGA platforms. Prototyping and validating systems for SerDes PHY. Creating verification environments using UVM methodology and System Verilog. Developing automation scripts in various languages. Collaborating with cross-functional teams to ensure design goals are met. The Impact You Will Have:
Contributing to next-generation product architecture. Enhancing the quality and performance of designs. Driving customer engagement and satisfaction. Influencing advanced features in our silicon IP portfolio. Setting industry standards with innovative solutions. Mentoring junior engineers. What You’ll Need:
Bachelor’s degree with 8+ years of relevant experience, or Master’s/PhD with 5+ years of relevant experience. Experience with hardware emulation on FPGA platforms. Experience with Zebu or Palladium platforms is a plus. Experience with formal verification methodology and relevant tools. Proficiency in system-level prototyping and validation for various protocols. Experience with UVM methodology and System Verilog. Proficiency in scripting languages. Knowledge of digital signal processing and data recovery circuits. Who You Are:
Self-motivated and proactive with attention to detail. Excellent organizational and communication skills. Effective networking with senior personnel. The Team You’ll Be A Part Of:
You will join a team of experienced engineers focused on delivering high-end mixed-signal designs. The team values collaboration and knowledge sharing, fostering a supportive and innovative work environment. Rewards and Benefits:
We offer comprehensive health, wellness, and financial benefits. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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