Google Inc.
Chip Package Signal and Power Integrity Engineer
Google Inc., Sunnyvale, California, United States, 94087
Chip Package Signal and Power Integrity Engineer
Company:
GoogleLocation:
Sunnyvale, CA, USAExperience Level:
MidMinimum Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.5 years of industry experience in the SI/PI field.Experience in chip package SI/PI design for interconnections and advanced package design.Preferred Qualifications:
Experience in post silicon correlation with models.Experience with 2.5D/3D package design such as silicon interposer, silicon bridge, 3D die stacking.Experience in cross-functional collaboration with chip top design, physical design, STA, package, system design, and validation teams.Experience in programming and data analysis with Matlab, Python, C++ and statistical tools to establish automation flows and data processing.Understanding of on and off chip power delivery and STA/voltage budget.Familiarity with memory testing, next generation memory, chiplet standards and timing budget methodology.About the Job:
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.As a Chip Package Signal and Power Integrity Engineer, you will be responsible for the chip package design with signal/power integrity simulation and characterization at the chip, package, and system levels. You will be part of a larger team with Chip Architects, ASIC Engineers, Physical Design, and other SI/PI Engineers. You will work with various cross-functional teams, including Chip Design, System Design, software teams, and vendors. You will drive chip packaging signal and power implementations from product planning to New Product Introduction (NPI).Responsibilities:
Contribute to chip-package-system co-design by performing Signal Integrity (SI)/Power Integrity (PI) analysis and optimization to involve in the product definition and optimize chip floorplan, power tree structure, net lists, etc for High Performance Computing (HPC) based on 2.5D/3D package technology.Develop next generation IO interfaces (serdes, memory, D2D) considering IO PHY, SI/PI, and physical design.Collaborate with chip design team, system design teams, and suppliers to drive chip package SI/PI design targets, unleash boundaries of chip performance, and explore SI/PI and DFM tradeoffs for advanced package design closure for production.Provide feedback on chip floorplan considering IP performance/package/system routability and SI/PI.Conduct post silicon validation and qualification of high-speed interfaces for NPI.Compensation:
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.Equal Opportunity Employer:
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition, expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law.Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.
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Company:
GoogleLocation:
Sunnyvale, CA, USAExperience Level:
MidMinimum Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.5 years of industry experience in the SI/PI field.Experience in chip package SI/PI design for interconnections and advanced package design.Preferred Qualifications:
Experience in post silicon correlation with models.Experience with 2.5D/3D package design such as silicon interposer, silicon bridge, 3D die stacking.Experience in cross-functional collaboration with chip top design, physical design, STA, package, system design, and validation teams.Experience in programming and data analysis with Matlab, Python, C++ and statistical tools to establish automation flows and data processing.Understanding of on and off chip power delivery and STA/voltage budget.Familiarity with memory testing, next generation memory, chiplet standards and timing budget methodology.About the Job:
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.As a Chip Package Signal and Power Integrity Engineer, you will be responsible for the chip package design with signal/power integrity simulation and characterization at the chip, package, and system levels. You will be part of a larger team with Chip Architects, ASIC Engineers, Physical Design, and other SI/PI Engineers. You will work with various cross-functional teams, including Chip Design, System Design, software teams, and vendors. You will drive chip packaging signal and power implementations from product planning to New Product Introduction (NPI).Responsibilities:
Contribute to chip-package-system co-design by performing Signal Integrity (SI)/Power Integrity (PI) analysis and optimization to involve in the product definition and optimize chip floorplan, power tree structure, net lists, etc for High Performance Computing (HPC) based on 2.5D/3D package technology.Develop next generation IO interfaces (serdes, memory, D2D) considering IO PHY, SI/PI, and physical design.Collaborate with chip design team, system design teams, and suppliers to drive chip package SI/PI design targets, unleash boundaries of chip performance, and explore SI/PI and DFM tradeoffs for advanced package design closure for production.Provide feedback on chip floorplan considering IP performance/package/system routability and SI/PI.Conduct post silicon validation and qualification of high-speed interfaces for NPI.Compensation:
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.Equal Opportunity Employer:
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition, expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law.Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.
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