Micron Memory Malaysia Sdn Bhd
Sr. Manager Process Integration- ATE ID1
Micron Memory Malaysia Sdn Bhd, New York, New York, United States,
Our vision is to transform how the world uses information to enrich life for
all .Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron plans to invest more than $150 billion globally over the next decade in groundbreaking manufacturing and R&D, including fab expansion in the United States, giving us the opportunity to bring in passionate team members to help us continue to be at the forefront of memory in the World. Micron has an outstanding opportunity for a high energy, tenacious, ambitious, result driven individual with a strong work ethic and integrity to join our Facilities Team in Boise, Idaho.Job summary:As ID1 ATE process integration Sr. manager, you are responsible for hiring talent to build the ID1 ATE module PI team. This position’s responsibility includes directing and leading the module process integration (Array, periphery, container or BEOL) to transfer and introduce the DRAM node from TD or other HVM fab to ID1 fab including process benchmark, process maturity improvement, line stability maintaining to support yield ramp, and optimizing the process for cost reduction and quality improvement to production level. You will cooperate and coordinate with central team, other fabs, TD, quality team, design team to implement the best in class known methods and BKM to ID1.Responsibility:Drive effective transfer from TD or other HVM fabs.Drive module process integration optimizations for yield improvement.Drive effective process technology improvement that enables best-in-class yield, quality, and cost.Coordinate resource planning and milestones with sending and receiving sites to ensure transfer success.Collaborate with HVM, ADT, TD, Central Teams, other Fabs, and external groups to support overall needs and objectives of the Fab.Understand and lead efforts to meet the requirements of internal and external customers.Collaborate with Central teams and other Fabs to drive for standardization and BKM practices across From End network to enable DRAM Central of Excellence.Provide technical guidance and support to Manufacturing Engineering and Quality Engineering teams in driving preventive and corrective actions for internal and external quality and product issues.Empower and Develop the Talent:Develop human resource strategies to attract, retain, and reward talents, and effectively deploy them to maximize every individual’s potential.Develop performance targets and ensure Line of Sight is communicated to individual contributors.Oversee career development of PIE team through the area leadership and ensure succession plans for all key department positions.Manage team staffing and succession, prioritize work, remove barriers, and drive for accountability.Empower team members, promote teamwork, distribute work and learning opportunities, and provide a line of sight to strategic objectives.Minimum Qualifications/Requirement:5+ years’ experience in the semiconductor industry in the areas of Process Integration, Yield Enhancement, Product Engineering, Design, or Unit Process Development.Previous experience in DRAM is preferred including TD, HVM, and transfer team. Other memory technology or logic/foundry experience will be considered.Possess a deep understanding of the DRAM process flow.Demonstrated experience overseeing an engineering team (5+ direct reports).Success in resolving sophisticated issues.Think and communicate clearly in urgent and stressful situations.
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all .Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron plans to invest more than $150 billion globally over the next decade in groundbreaking manufacturing and R&D, including fab expansion in the United States, giving us the opportunity to bring in passionate team members to help us continue to be at the forefront of memory in the World. Micron has an outstanding opportunity for a high energy, tenacious, ambitious, result driven individual with a strong work ethic and integrity to join our Facilities Team in Boise, Idaho.Job summary:As ID1 ATE process integration Sr. manager, you are responsible for hiring talent to build the ID1 ATE module PI team. This position’s responsibility includes directing and leading the module process integration (Array, periphery, container or BEOL) to transfer and introduce the DRAM node from TD or other HVM fab to ID1 fab including process benchmark, process maturity improvement, line stability maintaining to support yield ramp, and optimizing the process for cost reduction and quality improvement to production level. You will cooperate and coordinate with central team, other fabs, TD, quality team, design team to implement the best in class known methods and BKM to ID1.Responsibility:Drive effective transfer from TD or other HVM fabs.Drive module process integration optimizations for yield improvement.Drive effective process technology improvement that enables best-in-class yield, quality, and cost.Coordinate resource planning and milestones with sending and receiving sites to ensure transfer success.Collaborate with HVM, ADT, TD, Central Teams, other Fabs, and external groups to support overall needs and objectives of the Fab.Understand and lead efforts to meet the requirements of internal and external customers.Collaborate with Central teams and other Fabs to drive for standardization and BKM practices across From End network to enable DRAM Central of Excellence.Provide technical guidance and support to Manufacturing Engineering and Quality Engineering teams in driving preventive and corrective actions for internal and external quality and product issues.Empower and Develop the Talent:Develop human resource strategies to attract, retain, and reward talents, and effectively deploy them to maximize every individual’s potential.Develop performance targets and ensure Line of Sight is communicated to individual contributors.Oversee career development of PIE team through the area leadership and ensure succession plans for all key department positions.Manage team staffing and succession, prioritize work, remove barriers, and drive for accountability.Empower team members, promote teamwork, distribute work and learning opportunities, and provide a line of sight to strategic objectives.Minimum Qualifications/Requirement:5+ years’ experience in the semiconductor industry in the areas of Process Integration, Yield Enhancement, Product Engineering, Design, or Unit Process Development.Previous experience in DRAM is preferred including TD, HVM, and transfer team. Other memory technology or logic/foundry experience will be considered.Possess a deep understanding of the DRAM process flow.Demonstrated experience overseeing an engineering team (5+ direct reports).Success in resolving sophisticated issues.Think and communicate clearly in urgent and stressful situations.
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